Re: arm64 fails to link when float converted to int (Was Re: [9front] netsurf native frontend (text_insert: illegal combination FCVTZSDW FCON NONE REG))

[cinap_lenrek@felloff.net]

this is clearly a compiler bug.

lets compare with the other compilers:

term% for(i in 5c 7c 8c){echo $i; $i -o/dev/null -S a.c}
5c
	TEXT	main+0(SB),0,$8
	MOVW	$1,R1
	MOVD	$1.50000000000000000e+00,F0
	MOVWD	R1,F1 <- convert lhs to float
	MULD	F0,F1 <- do floatingpoint multiplication
	MOVDW	F1,R3 <- convert result back to integer
	MOVW	$0,R0
	BL	,exits+0(SB)
	RET	,
	END	,
7c
	TEXT	main+0(SB),0,$16
	MOVW	$1,R1
	FCVTZSDW	$1.50000000000000000e+00,R2	<- tries to convert rhs to int??
	MULW	R2,R1,R2 <- multiplication done in int? bug!
	MOV	$0,R0
	BL	,exits+0(SB)
	RETURN	,
	END	,
8c
	TEXT	main+0(SB),0,$20
	MOVL	$1,size+-4(SP)
	FMOVD	$(1.50000000000000000e+00),F0
	FMOVL	size+-4(SP),F0 <- convert lhs to float
	FMULDP	F0,F1 <- do floatingpoint multiplication

	FSTCW	,.safe+-16(SP)
	MOVW	$3967,.safe+-14(SP)
	FLDCW	.safe+-14(SP), <- hahahaha, thanks intel!
	FMOVLP	F0,.safe+-12(SP)
	FLDCW	.safe+-16(SP),
	MOVL	.safe+-12(SP),AX <- convert result back to integer

	MOVL	$0,(SP)
	CALL	,exits+0(SB)
	RET	,
	END	,

we have to do the operation using the type of the right hand side:

diff -r f8f63e944375 sys/src/cmd/7c/cgen.c
--- a/sys/src/cmd/7c/cgen.c	Fri Jul 17 16:53:20 2020 +0200
+++ b/sys/src/cmd/7c/cgen.c	Sat Aug 01 13:33:09 2020 +0200
@@ -287,10 +287,10 @@
 				reglcgen(&nod2, l, Z);
 			else
 				nod2 = *l;
-			regalloc(&nod, n, nn);
+			regalloc(&nod, r, nn);
 			cgen(r, &nod);
 		} else {
-			regalloc(&nod, n, nn);
+			regalloc(&nod, r, nn);
 			cgen(r, &nod);
 			if(l->addable < INDEXED)
 				reglcgen(&nod2, l, Z);

with that change, 7c properly does the multiplication in floating
point, and converts the result back to integer:

term% /sys/src/cmd/7c/6.out -o/dev/null -S a.c
	TEXT	main+0(SB),0,$16
	MOVW	$1,R1
	FMOVD	$1.50000000000000000e+00,F1
	SCVTFWD	R1,F4 <- convert left hand side to float
	FMULD	F1,F4,F1 <- do floatingpoint multiplication
	FCVTZSDW	F1,R1 <- convert result back to integer
	MOV	$0,R0
	BL	,exits+0(SB)
	RETURN	,
	END	,

we'll need to to do a bunch of test now to make sure this
change doesnt break anything.

feel free to test and report any errors would be appreciated.

--
cinap