From: "Olivier Pérès" <olivier.peres@laposte.net>
To: caml-list@inria.fr
Subject: Re: [Caml-list] The tag bit
Date: Thu, 12 Aug 2004 17:10:04 +0200 [thread overview]
Message-ID: <411B884C.3020508@laposte.net> (raw)
In-Reply-To: <D981925B4F2CD611870300E0184CEE9B0157F25F@mail.lms-gmbh.de>
Bauer, Christoph wrote:
> Of couse this is just a naive idea, but please tell me why ;-)
Well, I can see several reasons :
* processors like powers of two, especially when it comes to the size
of a memory address, because of cache issues, so you'd better make it 32
or 64 words than 33 or 65.
* If the tag bit can be anywhere in a word you have to spend extra
time to extract it, whereas when it is at a fixed place, especially LSB
or MSB, it is very cheap and easy.
* You would need two registers to access a value and its tag instead
of one, and registers are very precious, at least on IA-32 architectures.
Olivier.
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next prev parent reply other threads:[~2004-08-12 15:07 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-08-12 14:31 Bauer, Christoph
2004-08-12 14:55 ` Florian Hars
2004-08-12 14:56 ` Marcin 'Qrczak' Kowalczyk
2004-08-12 15:10 ` Olivier Pérès [this message]
2004-08-12 15:30 ` Brian Hurt
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