* [PATCH] arm assembly changes for clang compatibility [not found] <1415313526-3350676-1-git-send-email-opensource@zhasha.com> @ 2014-11-06 22:38 ` Joakim Sindholt 2014-11-07 9:37 ` Luca Barbato 0 siblings, 1 reply; 6+ messages in thread From: Joakim Sindholt @ 2014-11-06 22:38 UTC (permalink / raw) To: musl; +Cc: Joakim Sindholt --- src/setjmp/arm/longjmp.s | 2 +- src/setjmp/arm/setjmp.s | 2 +- src/string/armel/memcpy.s | 60 +++++++++++++++++++++++------------------------ 3 files changed, 32 insertions(+), 32 deletions(-) diff --git a/src/setjmp/arm/longjmp.s b/src/setjmp/arm/longjmp.s index aff15fb..c3d15ae 100644 --- a/src/setjmp/arm/longjmp.s +++ b/src/setjmp/arm/longjmp.s @@ -20,7 +20,7 @@ longjmp: ldc p2, cr4, [ip], #48 2: tst r1,#0x40 beq 2f - ldc p11, cr8, [ip], #64 + .word 0xecbc8b10 /* vldmia ip!, {d8-d15} */ 2: tst r1,#0x200 beq 3f ldcl p1, cr10, [ip], #8 diff --git a/src/setjmp/arm/setjmp.s b/src/setjmp/arm/setjmp.s index b74dfc6..19f8abc 100644 --- a/src/setjmp/arm/setjmp.s +++ b/src/setjmp/arm/setjmp.s @@ -22,7 +22,7 @@ setjmp: stc p2, cr4, [ip], #48 2: tst r1,#0x40 beq 2f - stc p11, cr8, [ip], #64 + .word 0xecac8b10 /* vstmia ip!, {d8-d15} */ 2: tst r1,#0x200 beq 3f stcl p1, cr10, [ip], #8 diff --git a/src/string/armel/memcpy.s b/src/string/armel/memcpy.s index 9f24a4f..f05183a 100644 --- a/src/string/armel/memcpy.s +++ b/src/string/armel/memcpy.s @@ -73,12 +73,12 @@ memcpy: */ movs r12, r3, lsl #31 sub r2, r2, r3 /* we know that r3 <= r2 because r2 >= 4 */ - ldrmib r3, [r1], #1 - ldrcsb r4, [r1], #1 - ldrcsb r12,[r1], #1 - strmib r3, [r0], #1 - strcsb r4, [r0], #1 - strcsb r12,[r0], #1 + ldrbmi r3, [r1], #1 + ldrbcs r4, [r1], #1 + ldrbcs r12,[r1], #1 + strbmi r3, [r0], #1 + strbcs r4, [r0], #1 + strbcs r12,[r0], #1 src_aligned: @@ -101,10 +101,10 @@ src_aligned: /* conditionnaly copies 0 to 7 words (length in r3) */ movs r12, r3, lsl #28 - ldmcsia r1!, {r4, r5, r6, r7} /* 16 bytes */ - ldmmiia r1!, {r8, r9} /* 8 bytes */ - stmcsia r0!, {r4, r5, r6, r7} - stmmiia r0!, {r8, r9} + ldmiacs r1!, {r4, r5, r6, r7} /* 16 bytes */ + ldmiami r1!, {r8, r9} /* 8 bytes */ + stmiacs r0!, {r4, r5, r6, r7} + stmiami r0!, {r8, r9} tst r3, #0x4 ldrne r10,[r1], #4 /* 4 bytes */ strne r10,[r0], #4 @@ -171,18 +171,18 @@ less_than_32_left: /* conditionnaly copies 0 to 31 bytes */ movs r12, r2, lsl #28 - ldmcsia r1!, {r4, r5, r6, r7} /* 16 bytes */ - ldmmiia r1!, {r8, r9} /* 8 bytes */ - stmcsia r0!, {r4, r5, r6, r7} - stmmiia r0!, {r8, r9} + ldmiacs r1!, {r4, r5, r6, r7} /* 16 bytes */ + ldmiami r1!, {r8, r9} /* 8 bytes */ + stmiacs r0!, {r4, r5, r6, r7} + stmiami r0!, {r8, r9} movs r12, r2, lsl #30 ldrcs r3, [r1], #4 /* 4 bytes */ - ldrmih r4, [r1], #2 /* 2 bytes */ + ldrhmi r4, [r1], #2 /* 2 bytes */ strcs r3, [r0], #4 - strmih r4, [r0], #2 + strhmi r4, [r0], #2 tst r2, #0x1 - ldrneb r3, [r1] /* last byte */ - strneb r3, [r0] + ldrbne r3, [r1] /* last byte */ + strbne r3, [r0] /* we're done! restore everything and return */ 1: ldmfd sp!, {r5-r11} @@ -224,11 +224,11 @@ non_congruent: * becomes aligned to 32 bits (r5 = nb of words to copy for alignment) */ movs r5, r5, lsl #31 - strmib r3, [r0], #1 + strbmi r3, [r0], #1 movmi r3, r3, lsr #8 - strcsb r3, [r0], #1 + strbcs r3, [r0], #1 movcs r3, r3, lsr #8 - strcsb r3, [r0], #1 + strbcs r3, [r0], #1 movcs r3, r3, lsr #8 cmp r2, #4 @@ -355,23 +355,23 @@ less_than_thirtytwo: partial_word_tail: /* we have a partial word in the input buffer */ movs r5, lr, lsl #(31-3) - strmib r3, [r0], #1 + strbmi r3, [r0], #1 movmi r3, r3, lsr #8 - strcsb r3, [r0], #1 + strbcs r3, [r0], #1 movcs r3, r3, lsr #8 - strcsb r3, [r0], #1 + strbcs r3, [r0], #1 /* Refill spilled registers from the stack. Don't update sp. */ ldmfd sp, {r5-r11} copy_last_3_and_return: movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */ - ldrmib r2, [r1], #1 - ldrcsb r3, [r1], #1 - ldrcsb r12,[r1] - strmib r2, [r0], #1 - strcsb r3, [r0], #1 - strcsb r12,[r0] + ldrbmi r2, [r1], #1 + ldrbcs r3, [r1], #1 + ldrbcs r12,[r1] + strbmi r2, [r0], #1 + strbcs r3, [r0], #1 + strbcs r12,[r0] /* we're done! restore sp and spilled registers and return */ add sp, sp, #28 -- 2.0.4 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm assembly changes for clang compatibility 2014-11-06 22:38 ` [PATCH] arm assembly changes for clang compatibility Joakim Sindholt @ 2014-11-07 9:37 ` Luca Barbato 2014-11-07 10:48 ` Joakim Sindholt 0 siblings, 1 reply; 6+ messages in thread From: Luca Barbato @ 2014-11-07 9:37 UTC (permalink / raw) To: musl On 06/11/14 23:38, Joakim Sindholt wrote: > + .word 0xecbc8b10 /* vldmia ip!, {d8-d15} */ clang is already notified? lu ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm assembly changes for clang compatibility 2014-11-07 9:37 ` Luca Barbato @ 2014-11-07 10:48 ` Joakim Sindholt 2014-11-07 13:26 ` Rich Felker 0 siblings, 1 reply; 6+ messages in thread From: Joakim Sindholt @ 2014-11-07 10:48 UTC (permalink / raw) To: musl On Fri, 2014-11-07 at 10:37 +0100, Luca Barbato wrote: > On 06/11/14 23:38, Joakim Sindholt wrote: > > + .word 0xecbc8b10 /* vldmia ip!, {d8-d15} */ > > clang is already notified? > > lu I'm not sure what you mean. There isn't a bug in clang as it will happily accept "vldmia ip!, {d8-d15}". It just won't accept "ldc p11, cr8, [ip], #64" because that's not a legal instruction. Musl just uses it because it aliases to the former and gas won't complain about missing ARM features. http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20131104/194169.html ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm assembly changes for clang compatibility 2014-11-07 10:48 ` Joakim Sindholt @ 2014-11-07 13:26 ` Rich Felker 2014-11-22 20:54 ` Joakim Sindholt 0 siblings, 1 reply; 6+ messages in thread From: Rich Felker @ 2014-11-07 13:26 UTC (permalink / raw) To: musl On Fri, Nov 07, 2014 at 11:48:05AM +0100, Joakim Sindholt wrote: > On Fri, 2014-11-07 at 10:37 +0100, Luca Barbato wrote: > > On 06/11/14 23:38, Joakim Sindholt wrote: > > > + .word 0xecbc8b10 /* vldmia ip!, {d8-d15} */ > > > > clang is already notified? > > > > lu > > I'm not sure what you mean. There isn't a bug in clang as it will > happily accept "vldmia ip!, {d8-d15}". It just won't accept "ldc p11, > cr8, [ip], #64" because that's not a legal instruction. Musl just uses > it because it aliases to the former and gas won't complain about missing > ARM features. Yes, the problem is that we can't use the official mnemonic because the assembler will reject it when the target model lacks fpu, and we can't use the generic coprocessor mnemonic because ARM and clang intentionally removed support for it. :( Rich ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm assembly changes for clang compatibility 2014-11-07 13:26 ` Rich Felker @ 2014-11-22 20:54 ` Joakim Sindholt 2014-11-22 21:09 ` Rich Felker 0 siblings, 1 reply; 6+ messages in thread From: Joakim Sindholt @ 2014-11-22 20:54 UTC (permalink / raw) To: musl On Fri, 2014-11-07 at 08:26 -0500, Rich Felker wrote: > On Fri, Nov 07, 2014 at 11:48:05AM +0100, Joakim Sindholt wrote: > > On Fri, 2014-11-07 at 10:37 +0100, Luca Barbato wrote: > > > On 06/11/14 23:38, Joakim Sindholt wrote: > > > > + .word 0xecbc8b10 /* vldmia ip!, {d8-d15} */ > > > > > > clang is already notified? > > > > > > lu > > > > I'm not sure what you mean. There isn't a bug in clang as it will > > happily accept "vldmia ip!, {d8-d15}". It just won't accept "ldc p11, > > cr8, [ip], #64" because that's not a legal instruction. Musl just uses > > it because it aliases to the former and gas won't complain about missing > > ARM features. > > Yes, the problem is that we can't use the official mnemonic because > the assembler will reject it when the target model lacks fpu, and we > can't use the generic coprocessor mnemonic because ARM and clang > intentionally removed support for it. :( > > Rich Any chance of getting this committed or is there more work to be done and discussions to be had? This is the only change needed to get musl working on ARM clang. ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm assembly changes for clang compatibility 2014-11-22 20:54 ` Joakim Sindholt @ 2014-11-22 21:09 ` Rich Felker 0 siblings, 0 replies; 6+ messages in thread From: Rich Felker @ 2014-11-22 21:09 UTC (permalink / raw) To: musl On Sat, Nov 22, 2014 at 09:54:06PM +0100, Joakim Sindholt wrote: > On Fri, 2014-11-07 at 08:26 -0500, Rich Felker wrote: > > On Fri, Nov 07, 2014 at 11:48:05AM +0100, Joakim Sindholt wrote: > > > On Fri, 2014-11-07 at 10:37 +0100, Luca Barbato wrote: > > > > On 06/11/14 23:38, Joakim Sindholt wrote: > > > > > + .word 0xecbc8b10 /* vldmia ip!, {d8-d15} */ > > > > > > > > clang is already notified? > > > > > > > > lu > > > > > > I'm not sure what you mean. There isn't a bug in clang as it will > > > happily accept "vldmia ip!, {d8-d15}". It just won't accept "ldc p11, > > > cr8, [ip], #64" because that's not a legal instruction. Musl just uses > > > it because it aliases to the former and gas won't complain about missing > > > ARM features. > > > > Yes, the problem is that we can't use the official mnemonic because > > the assembler will reject it when the target model lacks fpu, and we > > can't use the generic coprocessor mnemonic because ARM and clang > > intentionally removed support for it. :( > > Any chance of getting this committed or is there more work to be done > and discussions to be had? > > This is the only change needed to get musl working on ARM clang. I think it's okay. It would be nice if we could find something that didn't cause it to get marked as data rather than code in the .o file (e.g. objdump shows it as .word instead of an instruction) but that's not a huge problem if we can't. Since ARM overhaul is a big item for this release cycle I'd like to get all the clang compatibility issues for ARM fixed too. Do you know what clang version has the issue we're working around in arch/arm/syscall_arch.h fixed so I can convert it to a version check (instead of just #ifdef __clang) and start considering a schedule for deprecating support for ancient clang? Rich ^ permalink raw reply [flat|nested] 6+ messages in thread
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2014-11-06 22:38 ` [PATCH] arm assembly changes for clang compatibility Joakim Sindholt
2014-11-07 9:37 ` Luca Barbato
2014-11-07 10:48 ` Joakim Sindholt
2014-11-07 13:26 ` Rich Felker
2014-11-22 20:54 ` Joakim Sindholt
2014-11-22 21:09 ` Rich Felker
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