From: Pedro Falcato <pedro.falcato@gmail.com>
To: musl@lists.openwall.com
Subject: Re: [musl] memset_riscv64
Date: Tue, 11 Apr 2023 10:48:31 +0100 [thread overview]
Message-ID: <CAKbZUD2Rfd9Lg37GY+N_bMeJOQJ=84yZ=SW9+vHMRdByU0CZ+A@mail.gmail.com> (raw)
In-Reply-To: <7ab4e713.9fae.1876e1ac122.Coremail.zhangfei@nj.iscas.ac.cn>
On Tue, Apr 11, 2023 at 3:18 AM 张飞 <zhangfei@nj.iscas.ac.cn> wrote:
>
> Hello,
>
> Currently, there is no assembly implementation of the memset function for riscv64 in Musl.
> This patch is a riscv64 assembly implementation of the memset function, which is implemented using the basic instruction set and
> has better performance than the c language implementation in Musl. I hope it can be integrated into Musl.
Hi!
Do you have performance measurements here? What exactly is the difference?
As far as I know, no one is actively optimizing on riscv yet, only
some movements in the upstream kernel (to prepare for vector extension
stuff, unaligned loads/stores) and the corresponding glibc patches.
Mainly because it's still super unobtanium and in very early stages,
so optimizing is very hard.
So what hardware did you use? Is there a large gain here? Given that
your memset looks so simple, wouldn't it just be easier to write this
in C?
--
Pedro
next prev parent reply other threads:[~2023-04-11 9:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-11 2:17 张飞
2023-04-11 9:48 ` Pedro Falcato [this message]
2023-04-19 5:33 ` 张飞
2023-04-19 9:02 ` Szabolcs Nagy
2023-04-20 8:17 ` 张飞
2023-04-21 13:30 ` Szabolcs Nagy
2023-04-21 14:50 ` Pedro Falcato
2023-04-21 16:54 ` Rich Felker
2023-04-21 17:01 ` enh
2023-04-26 7:25 ` 张飞
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