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* [9fans] aux/vga hsync/hblank confustion
@ 2015-01-10 22:50 cinap_lenrek
  2015-01-11  8:25 ` kokamoto
  2015-01-15  5:21 ` erik quanstrom
  0 siblings, 2 replies; 3+ messages in thread
From: cinap_lenrek @ 2015-01-10 22:50 UTC (permalink / raw)
  To: 9fans

it seems to me that aux/vga uses shb/ehb (start/end horizontal blank) to
really mean shs/ehs (start/end horizontal sync)?

there are some vgadb entries that specify shs *smaller* than shb and the
edid parser does the following:

	m->x = ha;
	m->ht = ha+hb;
	m->shs = ha;				<- *WHAT*
	m->shb = ha+hso;			<- *WHAT*
	m->ehb = ha+hso+hspw;		<- *WHAT*
	m->ehs = ha+hb;				<- *WHAT*

where:

ha = horizontal active
hb = horizontal blanking
hso = horizontal sync pulse offset (relative to start of blank)
hspw = horisontal sync pulse width

the hardcoded vesa standard modes in vesadb.c seem to use the field
in the right way i think.

interestinly, shs and ehb are rarely given in vgadb and we default
to: shs = shb and ehs = ehb when omited, so this might explain why
stuff works at all.

so what is going on here?

--
cinap



^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [9fans] aux/vga hsync/hblank confustion
  2015-01-10 22:50 [9fans] aux/vga hsync/hblank confustion cinap_lenrek
@ 2015-01-11  8:25 ` kokamoto
  2015-01-15  5:21 ` erik quanstrom
  1 sibling, 0 replies; 3+ messages in thread
From: kokamoto @ 2015-01-11  8:25 UTC (permalink / raw)
  To: 9fans

> the hardcoded vesa standard modes in vesadb.c seem to use the field
> in the right way i think.

I don't see the source, however, it's the vesa mode to have some
horizontal shift here.

Kenji




^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [9fans] aux/vga hsync/hblank confustion
  2015-01-10 22:50 [9fans] aux/vga hsync/hblank confustion cinap_lenrek
  2015-01-11  8:25 ` kokamoto
@ 2015-01-15  5:21 ` erik quanstrom
  1 sibling, 0 replies; 3+ messages in thread
From: erik quanstrom @ 2015-01-15  5:21 UTC (permalink / raw)
  To: 9fans

> there are some vgadb entries that specify shs *smaller* than shb and the
> edid parser does the following:
>
> 	m->x = ha;
> 	m->ht = ha+hb;
> 	m->shs = ha;				<- *WHAT*
> 	m->shb = ha+hso;			<- *WHAT*
> 	m->ehb = ha+hso+hspw;		<- *WHAT*
> 	m->ehs = ha+hb;				<- *WHAT*
>
> where:
>
> ha = horizontal active
> hb = horizontal blanking
> hso = horizontal sync pulse offset (relative to start of blank)
> hspw = horisontal sync pulse width
>
> the hardcoded vesa standard modes in vesadb.c seem to use the field
> in the right way i think.
>
> interestinly, shs and ehb are rarely given in vgadb and we default
> to: shs = shb and ehs = ehb when omited, so this might explain why
> stuff works at all.
>
> so what is going on here?

this might explain some frustration i had years ago with getting timings correct.

- erik



^ permalink raw reply	[flat|nested] 3+ messages in thread

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2015-01-10 22:50 [9fans] aux/vga hsync/hblank confustion cinap_lenrek
2015-01-11  8:25 ` kokamoto
2015-01-15  5:21 ` erik quanstrom

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