Computer Old Farts Forum
 help / color / mirror / Atom feed
* [COFF] Why did Motorola fail?
@ 2018-08-10  2:23 grog
  2018-08-10  2:55 ` stewart
                   ` (4 more replies)
  0 siblings, 5 replies; 10+ messages in thread
From: grog @ 2018-08-10  2:23 UTC (permalink / raw)


Forty years ago Motorola 680x0 CPUs powered most good Unix boxen, with
the exception of this upstart SPARC thing.  And then they were gone.
I'm trying to remember why.  Can anybody help me?  I recall claims
that Moto didn't put enough effort into development, but was this
primarily a technical or a commercial issue?

Greg
--
Sent from my desktop computer.
Finger grog at lemis.com for PGP public key.
See complete headers for address and phone numbers.
This message is digitally signed.  If your Microsoft mail program
reports problems, please read http://lemis.com/broken-MUA
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 163 bytes
Desc: not available
URL: <http://minnie.tuhs.org/pipermail/coff/attachments/20180810/5a260201/attachment.sig>


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [COFF] Why did Motorola fail?
  2018-08-10  2:23 [COFF] Why did Motorola fail? grog
@ 2018-08-10  2:55 ` stewart
  2018-08-10  6:00 ` arno.griffioen
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: stewart @ 2018-08-10  2:55 UTC (permalink / raw)


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 1609 bytes --]

Well RISC happened.  I suppose SPARC was part of that, but it was preceded by the IBM 801 and evolved along with the MIPS R2000 and R3000 and the HP PA-RISC.  In those days, semiconductor density wasn’t so high, and RISCs were substantially simpler.  Then Digital kicked everyone in the teeth with 200 MHz Alpha parts in the early ‘90s and we were off on the clock races.

Later, as density improved, CISCs became competitive again and by 1994 or so PCs running BSD were the systems of choice at my startup.  It was too late for Motorola.

One thing I’m puzzled about is that TI never really made a run.  They had very nice, fast, DSP chips around then, and it wouldn’t have been that hard to put together a decent general purpose chip, but it never happened.

> On 2018, Aug 9, at 10:23 PM, Greg 'groggy' Lehey <grog at lemis.com> wrote:
> 
> Forty years ago Motorola 680x0 CPUs powered most good Unix boxen, with
> the exception of this upstart SPARC thing.  And then they were gone.
> I'm trying to remember why.  Can anybody help me?  I recall claims
> that Moto didn't put enough effort into development, but was this
> primarily a technical or a commercial issue?
> 
> Greg
> --
> Sent from my desktop computer.
> Finger grog at lemis.com for PGP public key.
> See complete headers for address and phone numbers.
> This message is digitally signed.  If your Microsoft mail program
> reports problems, please read http://lemis.com/broken-MUA
> _______________________________________________
> COFF mailing list
> COFF at minnie.tuhs.org
> https://minnie.tuhs.org/cgi-bin/mailman/listinfo/coff



^ permalink raw reply	[flat|nested] 10+ messages in thread

* [COFF] Why did Motorola fail?
  2018-08-10  2:23 [COFF] Why did Motorola fail? grog
  2018-08-10  2:55 ` stewart
@ 2018-08-10  6:00 ` arno.griffioen
  2018-08-10  7:24 ` dave
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: arno.griffioen @ 2018-08-10  6:00 UTC (permalink / raw)


On Fri, Aug 10, 2018 at 12:23:10PM +1000, Greg 'groggy' Lehey wrote:
> Forty years ago Motorola 680x0 CPUs powered most good Unix boxen, with
> the exception of this upstart SPARC thing.  And then they were gone.
> I'm trying to remember why.  Can anybody help me?  I recall claims
> that Moto didn't put enough effort into development, but was this
> primarily a technical or a commercial issue?

I'd say it was mostly a commercial/business direction focus, perhaps combined
with lack of funds, that killed off the M68k family as a workstation/server
CPU in the end.

This is just my personal experience as an old Amiga/Atari/Mac geek though, so 
the official internal Motorola story may be totally different.

IMHO Motorola lost focus and started betting on too many horses/markets and
spread it's resources too thin to keep up the CPU horsepower race.

The M68k family itself was a good example of this with the company trying to 
push it more and more into wildly different markets with all sorts of wacky 
models that lacked various components (FPU, MMU, etc.) but in the process 
losing focus and as a result no longer investing in really making big steps 
or taking big leaps with the 'full fat' workstation/server models to keep 
the platform itself up to speed with competitors from AMD/Intel in the CISC 
arena.

Probably seemed like a good idea on the short term to sell more (cheaper)
units, but in the end it may have been too short-sighted.

Someting like the 68060 was a nice CPU but Moto really dropped the ball on the 
introduction and providing 'companion' support/emulation info for the 
reduced functions in some areas (MMU and FPU mostly) that killed it off 
for many system designers.

Around the Pentium era when Intel started goming out with the second 
generation that started exceeding the 100Mhz clock rate it became clear that 
Moto had lost the race and was seemingly not really interested anymore. 
(or had ran out of cash?)

I did hear some rumours that an 68080 was on the drawing board and a
push to move the instruction set of the family to 64-bit, but I don't know 
how much is/was true about that.

Even though (IMHO) the M68k was a much nicer CPU environment to work with 
than the 8086-on-steroids CPU's, you couldn't argue with the raw MIPS speed
for the low cost of the PC's by that time...

By the same time Moto also dabbled in the RISC area with the ill-fated
88000 series that never really gained traction apart from some workstations
and (again) lacking focus as to what they wanted to do with the platform
as far as it being aimed at embedded or workstation/server use.
(the multi-chip approach probably didn't make system builders too
happy either..)

In the end I suppose they kinda got what they wanted as they got fairly
succesful in the embedded market with the Coldfire as an 'm68k-reimagined'
CPU that was at least more focused as to it's market/task. 

Although even there I guess they missed the boat as ARM (and derivatives)
is totally prevalent in bucketloads of smartphones and appliances while
Colfdire CPU's are not as popular.

Small side-step.. The Coldfire is still so close to the original M68k 
achitecturally that the Linux/m68k tree is shared/merged with the 
Coldfire CPU support and even though the Colfdire is aimed at mostly 
embedded use they are starting to sprout MMU's and other bits..


							Bye, Arno.


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [COFF] Why did Motorola fail?
  2018-08-10  2:23 [COFF] Why did Motorola fail? grog
  2018-08-10  2:55 ` stewart
  2018-08-10  6:00 ` arno.griffioen
@ 2018-08-10  7:24 ` dave
  2018-08-10  7:44 ` bakul
  2018-08-10 14:43 ` lm
  4 siblings, 0 replies; 10+ messages in thread
From: dave @ 2018-08-10  7:24 UTC (permalink / raw)


On Fri, 10 Aug 2018, Greg 'groggy' Lehey wrote:

> Forty years ago Motorola 680x0 CPUs powered most good Unix boxen, with 
> the exception of this upstart SPARC thing.  And then they were gone. I'm 
> trying to remember why.  Can anybody help me?  I recall claims that Moto 
> didn't put enough effort into development, but was this primarily a 
> technical or a commercial issue?

Well, having Microsoft supporting Intel wouldn't've helped...

-- Dave


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [COFF] Why did Motorola fail?
  2018-08-10  2:23 [COFF] Why did Motorola fail? grog
                   ` (2 preceding siblings ...)
  2018-08-10  7:24 ` dave
@ 2018-08-10  7:44 ` bakul
  2018-08-10 13:40   ` clemc
  2018-08-10 14:43 ` lm
  4 siblings, 1 reply; 10+ messages in thread
From: bakul @ 2018-08-10  7:44 UTC (permalink / raw)


On Fri, 10 Aug 2018 12:23:10 +1000 Greg 'groggy' Lehey <grog at lemis.com> wrote:
>
> Forty years ago Motorola 680x0 CPUs powered most good Unix boxen, with
> the exception of this upstart SPARC thing.  And then they were gone.
> I'm trying to remember why.  Can anybody help me?  I recall claims
> that Moto didn't put enough effort into development, but was this
> primarily a technical or a commercial issue?

I think the greatest influence has to be what IBM choose for
the PC.

This is what Gates said in a 1997 interview with the PC
Magazine:

For IBM it was extremely different because this was a project
where they let a supplier -- a partner, whatever you call us
-- shape the definition of the machine and provide fundamental
elements of the machine. When they first came to us, their
concept was to do an 8-bit computer. And the project was more
notable because they were going to do it so quickly and use an
outside company....The novel thing was: could you work with
outsiders, which in this case was mostly ourselves but also
Intel, and do it quickly? And the key engineer on the project,
Lou Eggebrecht, was fast-moving. Once we convinced IBM to go
16-bit (and we looked at 68000 which unfortunately wasn't
debugged at the time so decided to go 8086), he cranked out
that motherboard in about 40 days.

Dave Bradley, who wrote the BIOS (Basic Input Output System)
for the IBM PC, and many of the other engineers involved say
IBM had already decided to use the x86 architecture while the
project was still a task force preparing for management
approval in August 1980.

In a 1990 article for Byte, Bradley said there were four main
reasons for choosing the 8088. First, it had to be a 16-bit
chip that overcame the 64K memory limit of the 8-bit
processors. Second, the processor and its peripheral chips had
to be immediately available in quantity. Third, it had to be
technology IBM was familiar with. And fourth, it had to have
available languages and operating systems.

Cribbed from:
https://forwardthinking.pcmag.com/chips/286228-why-the-ibm-pc-used-an-intel-8088


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [COFF] Why did Motorola fail?
  2018-08-10  7:44 ` bakul
@ 2018-08-10 13:40   ` clemc
  0 siblings, 0 replies; 10+ messages in thread
From: clemc @ 2018-08-10 13:40 UTC (permalink / raw)


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 4499 bytes --]

On Fri, Aug 10, 2018 at 3:44 AM, Bakul Shah <bakul at bitblocks.com> wrote:

>
> I think the greatest influence has to be what IBM choose for
> the PC.

I agree.. I think you nailed it.

FWIW:  I used to commute to work with the Les Crudele, who was the lead HW
guy on the 68000 (and later MIPS and few other things - pretty amazing
guy).Les' stories of how Moto dropped the ball are classic.  Frankly,
think the 'failure' started with chip at the start.  It was a skunkworks
project in the back of a lab, and they had to hide the original mask
charge.  They borrowed time on a PDP-11/70 (running ISC's UNIX) to do their
support.   Tom Grunner told his bosses that they were playing with an idea
and it was just a couple of guys, let them be.   The hundreds were focused
on the real product (6800 line),

What's really interesting is that IBM and Moto were pretty tight at the
time.  MECL - Motorola Emitter Coupled Logic

- had been designed by Moto for IBM for the System/360 and was licensed.
When the original chip X-series chip (what would become the 68000) was
fabbed, they sent 10 of them to a number of their partners (it did not have
a number yet).  IBM had them, as did we at Tektronix (and I've told the
story of by cobbling together hacks on the Ritchie compiler to create
something to emit what would become 68000 instructions in the summer of
1979 before it was announced).

Les says that when IBM visited Austin to talk about a processor for their
project, they had had the experimental chip running in the lab in NY/Conn.
 But Motorola marketing told them what they needed was the newly announced
6809 and that the device Les and team were making was just a test.  No,
plans for it.  IBM insisted on a 16bit part (per the Gates recommendation
discussed before and they knew others like Intel had them).  Moto tried to
show them the 16-bit extentions in the 6809.   Les said, IBM kept asking,
and asking about the 'other chip' but Moto management said it is not a
product - the 6809 is.

IBM would leave the Moto meeting, and the rest is history.

BTW: the other story he tells is when Jobs did use the 68000 for what would
become the Mac, Moto offered that base limit register MMU chip for free
(which I've forgotten the number); but Jobs said they didn't want it, it
would make the design too complicated.  They were making a PC and did not
need an MMU (remember the Xerox Alto's did not have either).  The other
thing of course is the hash they made of the 68000 instruction space with
the Mac OS system traps fiasco.

Then as Larry points out the CISC vs. RISC craze began, and the problem was
that by the time the 88000; Intel had started to catch up in base
performance.   And the whole RISC vs. CISC thing was misunderstood --
economics won out.


As I like to say, 'success' in the computer business is driven by economics
as the high bit, not pure technology.    Christensen's disruption theory
explains it the best.   The problem is that a new technology, particularly
when it comes from within, is scary for an established firm, because it
will erode the cash cow you already have.  Moto was making big bucks with
the 6800 and 6809 was the replacement -- that's what they had planned.  The
68000 came from nowhere and not valued, so it was not given a chance.  But
the time they recognized its value, they had lost the important (economic)
player (IBM).

To be fair, at the time, I did not think Intel would be able to recover
from the segmented log/short pointers issues of the 8086.  The 386 was an
awesome recovery from a technology standpoint, but it only came to be
because of the economics of the PC.  And by the way, it was also a back
room solution when large numbers of the rest of the firm was working on new
'better' tech chasing the RISC chimera.

BTW:  Look at the missteps Intel made with architect -- i432, i860, i960,
itianium.   Interesting technology.  As Larry said, Alpha was just amazing
from DEC.  But in the end, what mattered was economic volume.   Better
margins in all of these than the established tech, but they all lost in the
end.

It will be interesting to see if my firm realizes this we move into the
future.   High margins are something sr manager loves because it keeps
profits up/the stock price high, until the disruption occurs.....  then you
are in trouble.
ᐧ
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://minnie.tuhs.org/pipermail/coff/attachments/20180810/76f856dc/attachment-0001.html>


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [COFF] Why did Motorola fail?
  2018-08-10  2:23 [COFF] Why did Motorola fail? grog
                   ` (3 preceding siblings ...)
  2018-08-10  7:44 ` bakul
@ 2018-08-10 14:43 ` lm
  2018-08-10 15:13   ` clemc
  4 siblings, 1 reply; 10+ messages in thread
From: lm @ 2018-08-10 14:43 UTC (permalink / raw)


On Fri, Aug 10, 2018 at 12:23:10PM +1000, Greg 'groggy' Lehey wrote:
> Forty years ago Motorola 680x0 CPUs powered most good Unix boxen, with
> the exception of this upstart SPARC thing.  And then they were gone.

The original SPARC CPU was 20K gates and was faster than the 68020.
My guess is cheaper as well.  I was at Sun as they were making the
transition from 68K to SPARC and we all fought to get SPARC machines
because of performance.

I liked the 68K well enough, it was fairly nice in assembler (though
my heart belongs to the PDP-11 first, the National 32032 next, and
then the 68K for assembler).  But the SPARC chips were just faster.


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [COFF] Why did Motorola fail?
  2018-08-10 14:43 ` lm
@ 2018-08-10 15:13   ` clemc
  2018-08-10 15:45     ` lm
  0 siblings, 1 reply; 10+ messages in thread
From: clemc @ 2018-08-10 15:13 UTC (permalink / raw)


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 2156 bytes --]

On Fri, Aug 10, 2018 at 10:43 AM, Larry McVoy <lm at mcvoy.com> wrote:

> The original SPARC CPU was 20K gates and was faster than the 68020.
>
Yep...   pretty clean design.



> My guess is cheaper as well.

Maybe -- TI was the fab right?   Moto's fabs were pretty good, not as good
at Intel in those days.

IIRC TI was still transitioning from BiPolar to CMOS, and most of the fab
capacity was still in their BiPolar area (somewhere along the line the
bought Nat Semi).   As I understand from a buddy who as at TI at the time,
DSPs and SPARCs were driving the transistion.  But they might not have been
there yet.




> I was at Sun as they were making the
> transition from 68K to SPARC and we all fought to get SPARC machines
> because of performance.
>
Yeah, they kicked butt.  Less is more and all that.   Had us worried at
Stellar because we were doing custom (Gate Arrays).    We had hit 22 MIPS,
if I recall Sparc was 4-6 range; but that was pretty darned good for a
single chip at the time.



>
> I liked the 68K well enough, it was fairly nice in assembler (though
> my heart belongs to the PDP-11 first, the National 32032 next, and
> then the 68K for assembler).  But the SPARC chips were just faster.

+1

althought I'd probably swap the 68K and 32032 because the National device
(which was pretty much a vax on a chip, as the 68k was an 11 on a chip),
was clean and cool, it was later in my life; so I knew the 68K better.

BTW:  Stellar was a 'RISCy' 68K with support for Fortran (*i.e.*
indirection beyond pure load/store).   We used to say all devices post
Dave's papers were RISC ;-)    FWIW:
I never really thought much of the RISC chips, accept maybe the by the time
of the MIPS 4400 series; but then again they were were designed for
compiler writers.



And the whole RISC thing was a bit of marketing.   John Coche never said
"reduce to the instruction set", he said "compile to (*i.e.* expose) the
microcode."   Dave sort of missunderstood his message.

Clem
ᐧ
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://minnie.tuhs.org/pipermail/coff/attachments/20180810/a4387a9a/attachment.html>


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [COFF] Why did Motorola fail?
  2018-08-10 15:13   ` clemc
@ 2018-08-10 15:45     ` lm
  2018-08-10 15:53       ` [COFF] Why did Motorola fail? (Cost and performance) david
  0 siblings, 1 reply; 10+ messages in thread
From: lm @ 2018-08-10 15:45 UTC (permalink / raw)


On Fri, Aug 10, 2018 at 11:13:48AM -0400, Clem Cole wrote:
> On Fri, Aug 10, 2018 at 10:43 AM, Larry McVoy <lm at mcvoy.com> wrote:
> > My guess is cheaper as well.
> 
> Maybe -- TI was the fab right?   Moto's fabs were pretty good, not as good
> at Intel in those days.

I'm not sure who did the first SPARC, I'd guess TI, they did most of
the follow on designs.  I know Fujitsu did some SPARC chips but I'm not
sure if that was solely for their own use or if Sun used those.  But I
remember a lot of TI chips and TI was not speedy turning those around,
the hardware guys were under a lot of pressure to get it right the first
time (and I think that was rare).

> I never really thought much of the RISC chips, accept maybe the by the time
> of the MIPS 4400 series; but then again they were were designed for
> compiler writers.
> 
> And the whole RISC thing was a bit of marketing.   

Yeah, I tend to agree.  But there was some wisdom in less is more, it was
easier to make the clocks go faster when the instructions are simple.


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [COFF] Why did Motorola fail? (Cost and performance)
  2018-08-10 15:45     ` lm
@ 2018-08-10 15:53       ` david
  0 siblings, 0 replies; 10+ messages in thread
From: david @ 2018-08-10 15:53 UTC (permalink / raw)


Back when I was doing vision processing in a parallel way, I worked with the hardware guys to move from a 68010 to  the 020 and then the 040. Each was a big step up in performance and we had little work to do in the software other than recompiling to get the better performance.

And then I ran the vision algorithms on my Sparc desktop box (I think it was a SS10, maybe a SS20). And they ran about 30x faster. Same image, same results, 30x faster. 

So I spent some time to come up with a design that pulled the images from the camera directly into the Sparc host and with a little help from the hardware guys we had a board that would do that.

So it came down to cost and performance. I loved the 68k processors and was very happy with them, but we could build custom frame grabbers cheaper and have the host do the work faster.

	David




^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2018-08-10 15:53 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-08-10  2:23 [COFF] Why did Motorola fail? grog
2018-08-10  2:55 ` stewart
2018-08-10  6:00 ` arno.griffioen
2018-08-10  7:24 ` dave
2018-08-10  7:44 ` bakul
2018-08-10 13:40   ` clemc
2018-08-10 14:43 ` lm
2018-08-10 15:13   ` clemc
2018-08-10 15:45     ` lm
2018-08-10 15:53       ` [COFF] Why did Motorola fail? (Cost and performance) david

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).