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* How to build a musl toolchain for or1k
@ 2014-07-19 22:26 Stefan Kristiansson
  2014-07-19 23:06 ` Rich Felker
  0 siblings, 1 reply; 3+ messages in thread
From: Stefan Kristiansson @ 2014-07-19 22:26 UTC (permalink / raw)
  To: musl

Now when or1k support has landed in musl, I thought I'd take the opportunity to
give some notes on how to build a toolchain for it (and also, Rich asked me to).

Up until now, I've been building the toolchain I've been using 'by hand'
without any musl specific patches to gcc, but this isn't really a viable
option in the long run.
So, instead, I've adopted the musl-cross way of building the toolchain.

There's a couple of problems, some of which musl-cross can handle out of
the box, and one that it can't.
First, although we have upstreamed or1k support to binutils, it
was done quite recently, so the support hasn't hit any official release yet.
But musl-cross can make use of the binutil snapshots, so not a big deal.
Second, there's no or1k support in the Linux kernel headers tarball,
so unpatched vanilla headers have to be used.
And third, our gcc port isn't upstreamed yet (our biggest issue is rounding
up contributors to assign copyright to FSF, but we're working on that).

To get around the third issue, I modified musl-cross to fetch gcc from an
arbitrary location.

I've pushed this modified version together with the necessary changes for or1k
and a custom config.sh to this repo:
https://github.com/skristiansson/musl-cross

So, all that is needed in order to build a or1k-linux-musl toolchain should
be to run ./build.sh from that repo.

And some notes about emulators and kernel for or1k.
There's support in qemu for or1k, but the atomic instructions required for musl
has not yet been added to that, but we have a functional simulator (or1ksim)
with support for them.

git clone -b or1k-master git://github.com/openrisc/or1ksim.git
./configure --target=or1k-elf
make && make install

Mainline kernel is missing support for a couple of features required
by musl (mostly related to the atomic instructions). I've added
support for them, but sending out patches for them is yet to be done.
In the meantime, they are all present in the smp branch of
git://openrisc.net/stefan/linux.

git clone -b smp git://openrisc.net/stefan/linux
make ARCH=openrisc musl_defconfig
make ARCH=openrisc

There's an initramfs included in that, so with or1ksim installed, it
should be possible to boot with:
or1k-elf-sim -f arch/openrisc/or1ksim.cfg vmlinux
and then from another terminal
telnet localhost 10084

This became pretty lengthy, but if nothing else, now I've got some
instructions in a public place to point people to. =P

Stefan


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: How to build a musl toolchain for or1k
  2014-07-19 22:26 How to build a musl toolchain for or1k Stefan Kristiansson
@ 2014-07-19 23:06 ` Rich Felker
  2014-07-20  6:18   ` Stefan Kristiansson
  0 siblings, 1 reply; 3+ messages in thread
From: Rich Felker @ 2014-07-19 23:06 UTC (permalink / raw)
  To: Stefan Kristiansson; +Cc: musl

On Sun, Jul 20, 2014 at 01:26:29AM +0300, Stefan Kristiansson wrote:
> Now when or1k support has landed in musl, I thought I'd take the opportunity to
> give some notes on how to build a toolchain for it (and also, Rich asked me to).

Thanks!

> And some notes about emulators and kernel for or1k.
> There's support in qemu for or1k, but the atomic instructions required for musl
> has not yet been added to that, but we have a functional simulator (or1ksim)
> with support for them.
> 
> git clone -b or1k-master git://github.com/openrisc/or1ksim.git
> ../configure --target=or1k-elf
> make && make install
> 
> Mainline kernel is missing support for a couple of features required
> by musl (mostly related to the atomic instructions). I've added
> support for them, but sending out patches for them is yet to be done.
> In the meantime, they are all present in the smp branch of
> git://openrisc.net/stefan/linux.

What kernel features are needed for atomics to work? I figured it was
mainly a cpu-level issue. Or were changes needed for the kernel to
properly clear the lwa/swa flag on context switch?

It would be really nice if the kernel could also trap and emulate
l.lwa/l.swa and perhaps also l.msync so that these features could be
used on old emulators/hardware that lack them.

> git clone -b smp git://openrisc.net/stefan/linux
> make ARCH=openrisc musl_defconfig
> make ARCH=openrisc

What's special in musl_defconfig? :)

> This became pretty lengthy, but if nothing else, now I've got some
> instructions in a public place to point people to. =P

Indeed. It sounds like it's still enough work that I won't setup an
environment yet (I've got lots of other things I'm trying to finish
including getting the next musl release out on schedule this month)
but I'm looking forward to having a setup (perhaps musl-cross
binaries, Gregor? :) to try it out in the future.

Rich


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: How to build a musl toolchain for or1k
  2014-07-19 23:06 ` Rich Felker
@ 2014-07-20  6:18   ` Stefan Kristiansson
  0 siblings, 0 replies; 3+ messages in thread
From: Stefan Kristiansson @ 2014-07-20  6:18 UTC (permalink / raw)
  To: Rich Felker; +Cc: musl

On Sat, Jul 19, 2014 at 07:06:56PM -0400, Rich Felker wrote:
> On Sun, Jul 20, 2014 at 01:26:29AM +0300, Stefan Kristiansson wrote:
> > Mainline kernel is missing support for a couple of features required
> > by musl (mostly related to the atomic instructions). I've added
> > support for them, but sending out patches for them is yet to be done.
> > In the meantime, they are all present in the smp branch of
> > git://openrisc.net/stefan/linux.
> 
> What kernel features are needed for atomics to work? I figured it was
> mainly a cpu-level issue. Or were changes needed for the kernel to
> properly clear the lwa/swa flag on context switch?
> 

It is mainly a cpu-level issue, and there's actually only two patches in that
branch that are required for musl to work.
1) There's no way on or1k to determine if a data page fault was
a read or write fault other than reading the instruction at the
faulting PC and check if it was a store instructions.
The atomic store instruction (l.swa) was missing from this check.
http://git.openrisc.net/cgit.cgi/stefan/linux/commit/?h=smp&id=a966c95bb10a43cab16e2be97518ad8be0695a95

2) In order to get kernel support for robust_list, there need to be
arch specific implementations of the futex_atomic_* operations.
These implementations were missing.
http://git.openrisc.net/cgit.cgi/stefan/linux/commit/?h=smp&id=d863b0637811dd559363a3f1bf9d966e35b21bab

> It would be really nice if the kernel could also trap and emulate
> l.lwa/l.swa and perhaps also l.msync so that these features could be
> used on old emulators/hardware that lack them.
> 

I agree.

> > git clone -b smp git://openrisc.net/stefan/linux
> > make ARCH=openrisc musl_defconfig
> > make ARCH=openrisc
> 
> What's special in musl_defconfig? :)
> 

Actually very little ;)
The support for the atomic instructions is enabled.

Stefan


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2014-07-20  6:18 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-07-19 22:26 How to build a musl toolchain for or1k Stefan Kristiansson
2014-07-19 23:06 ` Rich Felker
2014-07-20  6:18   ` Stefan Kristiansson

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