RE: [musl] RISC-V 32bit port in MUSL upstream

["Venkata Ramanaiah Nalamothu (QUIC)" <quic_vnalamot@quicinc.com>]

-----Original Message-----
From: Markus Wichmann <nullplan@gmx.net> 
Sent: Friday, September 29, 2023 8:13 PM
To: musl@lists.openwall.com
Subject: Re: [musl] RISC-V 32bit port in MUSL upstream

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Am Thu, Sep 28, 2023 at 04:39:37AM +0000 schrieb Venkata Ramanaiah Nalamothu (QUIC):
> Thank you very much for sharing the patch set/development branch.
>
> Looking at your github tree commit history, it seems the tree is actively maintained.
> May I know what is stopping from pushing these changes into MUSL community version?
> Were there any technical challenges or someone just need to find time to work with the community to get the changes reviewed/merged?

According to [0], main issue for Rich was that it was not a stable ABI yet back in 2020. Has that changed yet?

Looks like that has changed, otherwise GLIBC upstream wouldn't have accepted the RISC-V 32bit port, which is available since 2021 in GLIBC upstream.
As per [1],
     * Support for the RISC-V ISA running on Linux has been expanded to run on 32-bit hardware. This is supported for the following ISA and ABI pairs:
        - rv32imac ilp32
        - rv32imafdc ilp32
        - rv32imafdc ilp32d
       The 32-bit RISC-V port requires at least Linux 5.4, GCC 7.1 and binutils 2.28.

Regards,
Ram Nalamothu

[1] https://sourceware.org/pipermail/libc-alpha/2021-February/122207.html

Ciao,
Markus

[0] https://www.openwall.com/lists/musl/2020/03/12/2