[TUHS] SVR3 or SVR4 kernel sources for 3B2/700

[TUHS] SVR3 or SVR4 kernel sources for 3B2/700

[Seth Morabito]

It's been a while since I asked, and I would be extraordinarily surprised if the situation had changed, but I thought I might try my luck one more time...

The 3B2 is a dreadful computer, but nevertheless I find myself compelled to try to make the SIMH 3B2 emulation more accurate. The emulation for the 3B2/400 is probably as accurate as it's ever going to be, but the 3B2/700 has very clear and known bugs. One of the things holding back fixing those bugs is documentation in the form of source code. I have the leaked kernel source code for the 3B2/400 ("Version 2") architecture, but I have never seen any kernel source code that targets the 3B2/700 or /1000 ("Version 3") architecture. All I have are the system header files from /usr/include/sys, nothing more.

If by some chance you have a /usr/src/uts tree for the 3B2/600, /700, or /1000, I would love to see it. It would refer to the system board using the code name "FALCON", probably with a lot of #ifdef's (at least the system headers do)

-Seth
-- 
  Seth Morabito * Poulsbo, WA * https://loomcom.com/

[TUHS] Re: SVR3 or SVR4 kernel sources for 3B2/700

[Ben Huntsman]

Speaking of the 3B2, has anyone ever seen DMERT out there or had a chance to run it on their 3B2?



Sent from my iPhone

> On Sep 29, 2023, at 4:58 PM, Seth Morabito <web@loomcom.com> wrote:
> 
> It's been a while since I asked, and I would be extraordinarily surprised if the situation had changed, but I thought I might try my luck one more time...
> 
> The 3B2 is a dreadful computer, but nevertheless I find myself compelled to try to make the SIMH 3B2 emulation more accurate. The emulation for the 3B2/400 is probably as accurate as it's ever going to be, but the 3B2/700 has very clear and known bugs. One of the things holding back fixing those bugs is documentation in the form of source code. I have the leaked kernel source code for the 3B2/400 ("Version 2") architecture, but I have never seen any kernel source code that targets the 3B2/700 or /1000 ("Version 3") architecture. All I have are the system header files from /usr/include/sys, nothing more.
> 
> If by some chance you have a /usr/src/uts tree for the 3B2/600, /700, or /1000, I would love to see it. It would refer to the system board using the code name "FALCON", probably with a lot of #ifdef's (at least the system headers do)
> 
> -Seth
> -- 
>  Seth Morabito * Poulsbo, WA * https://loomcom.com/

[TUHS] Re: SVR3 or SVR4 kernel sources for 3B2/700

[Marc Donner]

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I infer from your inquiry that there is no formal statement of the ISA for
the machine.  Is that correct?

On Sat, Sep 30, 2023 at 1:57 AM Seth Morabito <web@loomcom.com> wrote:

> It's been a while since I asked, and I would be extraordinarily surprised
> if the situation had changed, but I thought I might try my luck one more
> time...
>
> The 3B2 is a dreadful computer, but nevertheless I find myself compelled
> to try to make the SIMH 3B2 emulation more accurate. The emulation for the
> 3B2/400 is probably as accurate as it's ever going to be, but the 3B2/700
> has very clear and known bugs. One of the things holding back fixing those
> bugs is documentation in the form of source code. I have the leaked kernel
> source code for the 3B2/400 ("Version 2") architecture, but I have never
> seen any kernel source code that targets the 3B2/700 or /1000 ("Version 3")
> architecture. All I have are the system header files from /usr/include/sys,
> nothing more.
>
> If by some chance you have a /usr/src/uts tree for the 3B2/600, /700, or
> /1000, I would love to see it. It would refer to the system board using the
> code name "FALCON", probably with a lot of #ifdef's (at least the system
> headers do)
>
> -Seth
> --
>   Seth Morabito * Poulsbo, WA * https://loomcom.com/
>

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[TUHS] Re: SVR3 or SVR4 kernel sources for 3B2/700

[Seth Morabito]

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On Fri, Sep 29, 2023, at 11:35 PM, Marc Donner wrote:
> I infer from your inquiry that there is no formal statement of the ISA for the machine.  Is that correct?

The CPU itself is a standard off the shelf WE32200, which is thankfully very well documented, so the ISA is not really an issue. The real thorny question is how everything else is all hooked together. The interrupt controller, the IO buses, the DRAM controller, and so on, are partly documented in the technical reference manual, but only at a very high level, and with at least a few major inaccuracies. Detailed behavior like bus timeouts, error conditions, and so on, are very poorly documented. I was only able to infer how everything was connected on the 3B2/400 by reading the kernel source code to understand what the various drivers expected to see, but the 3B2/700 has a very different memory map and the kernel source code is missing. I have the system board schematics, but there an awful lot of PALs, and no PAL truth tables.

-Seth
-- 
  Seth Morabito * Poulsbo, WA * https://loomcom.com/


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