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* [9fans] cmovne
@ 2015-02-08 23:27 erik quanstrom
  2015-02-08 23:36 ` Don Bailey
  2015-02-08 23:43 ` minux
  0 siblings, 2 replies; 8+ messages in thread
From: erik quanstrom @ 2015-02-08 23:27 UTC (permalink / raw)
  To: 9fans

am i reading the intel docs wrong, or is 6l missing a valid instruction?

memmove5: doasm: notfound from=12 to=92 (47)	CMOVQNE	DX,(DI)

- erik



^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [9fans] cmovne
  2015-02-08 23:27 [9fans] cmovne erik quanstrom
@ 2015-02-08 23:36 ` Don Bailey
  2015-02-08 23:37   ` erik quanstrom
  2015-02-08 23:43 ` minux
  1 sibling, 1 reply; 8+ messages in thread
From: Don Bailey @ 2015-02-08 23:36 UTC (permalink / raw)
  To: Fans of the OS Plan 9 from Bell Labs

Technically, there are a few instructions that the 9 compilers miss. This is generally handled by the BYTE directive (see the asm manual). 

Alternatively, adding a new instruction to the lexer/etc is fairly trivial. See diffs between vc and kc, for example. 

D



> On Feb 8, 2015, at 4:27 PM, erik quanstrom <quanstro@quanstro.net> wrote:
> 
> am i reading the intel docs wrong, or is 6l missing a valid instruction?
> 
> memmove5: doasm: notfound from=12 to=92 (47)    CMOVQNE    DX,(DI)
> 
> - erik
> 



^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [9fans] cmovne
  2015-02-08 23:36 ` Don Bailey
@ 2015-02-08 23:37   ` erik quanstrom
  2015-02-09  0:50     ` Don Bailey
  0 siblings, 1 reply; 8+ messages in thread
From: erik quanstrom @ 2015-02-08 23:37 UTC (permalink / raw)
  To: 9fans

On Sun Feb  8 15:31:26 PST 2015, don.bailey@gmail.com wrote:
> Technically, there are a few instructions that the 9 compilers miss.
> This is generally handled by the BYTE directive (see the asm manual).
>
> Alternatively, adding a new instruction to the lexer/etc is fairly
> trivial.  See diffs between vc and kc, for example.

you can't actually sneak around the linker with BYTE.  try it, you'll see.

i've added many instructions to the various compilers.  i'm just double checking
that it is indeed a valid instruction.  the manual says it is, but that's subject
to my reading comprehension.  :-)

- erik



^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [9fans] cmovne
  2015-02-08 23:43 ` minux
@ 2015-02-08 23:42   ` erik quanstrom
  2015-02-09  0:23     ` minux
  0 siblings, 1 reply; 8+ messages in thread
From: erik quanstrom @ 2015-02-08 23:42 UTC (permalink / raw)
  To: 9fans

> On Sun, Feb 8, 2015 at 6:27 PM, erik quanstrom <quanstro@quanstro.net>
> wrote:
>
> > am i reading the intel docs wrong, or is 6l missing a valid instruction?
> >
> > memmove5: doasm: notfound from=12 to=92 (47)    CMOVQNE DX,(DI)
> >
> Go's liblink (which is derived from [5869]l) and cmd/6a support this
> instruction.

does it support it with exactly that register combination?

- erik



^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [9fans] cmovne
  2015-02-08 23:27 [9fans] cmovne erik quanstrom
  2015-02-08 23:36 ` Don Bailey
@ 2015-02-08 23:43 ` minux
  2015-02-08 23:42   ` erik quanstrom
  1 sibling, 1 reply; 8+ messages in thread
From: minux @ 2015-02-08 23:43 UTC (permalink / raw)
  To: Fans of the OS Plan 9 from Bell Labs

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On Sun, Feb 8, 2015 at 6:27 PM, erik quanstrom <quanstro@quanstro.net>
wrote:

> am i reading the intel docs wrong, or is 6l missing a valid instruction?
>
> memmove5: doasm: notfound from=12 to=92 (47)    CMOVQNE DX,(DI)
>
Go's liblink (which is derived from [5869]l) and cmd/6a support this
instruction.

[-- Attachment #2: Type: text/html, Size: 683 bytes --]

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [9fans] cmovne
  2015-02-08 23:42   ` erik quanstrom
@ 2015-02-09  0:23     ` minux
  2015-02-09  0:29       ` erik quanstrom
  0 siblings, 1 reply; 8+ messages in thread
From: minux @ 2015-02-09  0:23 UTC (permalink / raw)
  To: Fans of the OS Plan 9 from Bell Labs

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On Sun, Feb 8, 2015 at 6:42 PM, erik quanstrom <quanstro@quanstro.net>
wrote:

> > On Sun, Feb 8, 2015 at 6:27 PM, erik quanstrom <quanstro@quanstro.net>
> > wrote:
> > > am i reading the intel docs wrong, or is 6l missing a valid
> instruction?
> > > memmove5: doasm: notfound from=12 to=92 (47)    CMOVQNE DX,(DI)> >
> > Go's liblink (which is derived from [5869]l) and cmd/6a support this
> > instruction.
> does it support it with exactly that register combination?
>
No. I just realized you want conditional move from DX to (DI).

It's an illegal combination. The intel document only lists three forms for
CMOVNE:
CMOVNE r16, r/m16 // CMOVWNE
CMOVNE r32, r/m32 // CMOVLNE
CMOVNE r64, r/m64 // CMOVQNE

All of them are conditionally moving from reg/mem to a register.
(Also note the description "These instructions can move 16-bit, 32-bit or
64-bit values
from memory to a general-purpose register or from one general-purpose
register to another.")

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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [9fans] cmovne
  2015-02-09  0:23     ` minux
@ 2015-02-09  0:29       ` erik quanstrom
  0 siblings, 0 replies; 8+ messages in thread
From: erik quanstrom @ 2015-02-09  0:29 UTC (permalink / raw)
  To: 9fans

> No. I just realized you want conditional move from DX to (DI).
>
> It's an illegal combination. The intel document only lists three forms for
> CMOVNE:
> CMOVNE r16, r/m16 // CMOVWNE
> CMOVNE r32, r/m32 // CMOVLNE
> CMOVNE r64, r/m64 // CMOVQNE
>
> All of them are conditionally moving from reg/mem to a register.
> (Also note the description "These instructions can move 16-bit, 32-bit or
> 64-bit values
> from memory to a general-purpose register or from one general-purpose
> register to another.")

d'oh!

ah!  thanks.  i tripped over intel listing the arguments in the other order.
glad i asked.

- erik



^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [9fans] cmovne
  2015-02-08 23:37   ` erik quanstrom
@ 2015-02-09  0:50     ` Don Bailey
  0 siblings, 0 replies; 8+ messages in thread
From: Don Bailey @ 2015-02-09  0:50 UTC (permalink / raw)
  To: Fans of the OS Plan 9 from Bell Labs

Ahh gotcha. 



> On Feb 8, 2015, at 4:37 PM, erik quanstrom <quanstro@quanstro.net> wrote:
> 
>> On Sun Feb  8 15:31:26 PST 2015, don.bailey@gmail.com wrote:
>> Technically, there are a few instructions that the 9 compilers miss.
>> This is generally handled by the BYTE directive (see the asm manual).
>> 
>> Alternatively, adding a new instruction to the lexer/etc is fairly
>> trivial.  See diffs between vc and kc, for example.
> 
> you can't actually sneak around the linker with BYTE.  try it, you'll see.
> 
> i've added many instructions to the various compilers.  i'm just double checking
> that it is indeed a valid instruction.  the manual says it is, but that's subject
> to my reading comprehension.  :-)
> 
> - erik
> 



^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2015-02-09  0:50 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-02-08 23:27 [9fans] cmovne erik quanstrom
2015-02-08 23:36 ` Don Bailey
2015-02-08 23:37   ` erik quanstrom
2015-02-09  0:50     ` Don Bailey
2015-02-08 23:43 ` minux
2015-02-08 23:42   ` erik quanstrom
2015-02-09  0:23     ` minux
2015-02-09  0:29       ` erik quanstrom

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