From: Mathias Krause <minipli@grsecurity.net> To: "Jason A . Donenfeld" <Jason@zx2c4.com> Cc: wireguard@lists.zx2c4.com, Mathias Krause <minipli@grsecurity.net> Subject: [PATCH 2/2] curve25519-x86_64: solve register constraints with reserved registers Date: Tue, 6 Jul 2021 15:27:14 +0200 [thread overview] Message-ID: <20210706132714.8220-3-minipli@grsecurity.net> (raw) In-Reply-To: <20210706132714.8220-1-minipli@grsecurity.net> The register constraints for the inline assembly in fsqr() and fsqr2() are pretty tight on what the compiler may assign to the remaining three register variables. The clobber list only allows the following to be used: RDI, RSI, RBP and R12. With RAP reserving R12 and a kernel having CONFIG_FRAME_POINTER=y, claiming RBP, there are only two registers left so the compiler rightfully complains about impossible constraints. Provide alternatives that'll allow a memory reference for 'out' to solve the allocation constraint dilemma for this configuration. Signed-off-by: Mathias Krause <minipli@grsecurity.net> --- Yes, the '+' constraint prefix doesn't need to be repeated for the alternatives. In fact, it's invalid syntax to do so (see [1]). Also "+rm" won't do the trick either, as in this case gcc still insists to have a free register -- even if it would choose a memory operand in the end. [1] https://gcc.gnu.org/onlinedocs/gcc/Multi-Alternative.html#Multi-Alternative --- src/crypto/zinc/curve25519/curve25519-x86_64.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/crypto/zinc/curve25519/curve25519-x86_64.c b/src/crypto/zinc/curve25519/curve25519-x86_64.c index 79716c425b0c..67f55affcf88 100644 --- a/src/crypto/zinc/curve25519/curve25519-x86_64.c +++ b/src/crypto/zinc/curve25519/curve25519-x86_64.c @@ -581,7 +581,7 @@ static inline void fsqr(u64 *out, const u64 *f, u64 *tmp) " cmovc %%rdx, %%rax;" " add %%rax, %%r8;" " movq %%r8, 0(%0);" - : "+&r" (tmp), "+&r" (f), "+&r" (out) + : "+&r,&r" (tmp), "+&r,&r" (f), "+&r,m" (out) : : "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10", "%r11", "%rbx", "%r13", "%r14", "%r15", "memory", "cc" ); @@ -743,7 +743,7 @@ static inline void fsqr2(u64 *out, const u64 *f, u64 *tmp) " cmovc %%rdx, %%rax;" " add %%rax, %%r8;" " movq %%r8, 32(%0);" - : "+&r" (tmp), "+&r" (f), "+&r" (out) + : "+&r,&r" (tmp), "+&r,&r" (f), "+&r,m" (out) : : "%rax", "%rcx", "%rdx", "%r8", "%r9", "%r10", "%r11", "%rbx", "%r13", "%r14", "%r15", "memory", "cc" ); -- 2.20.1
next prev parent reply other threads:[~2021-08-02 13:18 UTC|newest] Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-06 13:27 [PATCH 0/2] wireguard-linux-compat: grsecurity compat patches Mathias Krause 2021-07-06 13:27 ` [PATCH 1/2] compat: better grsecurity compatibility Mathias Krause 2021-07-06 13:27 ` Mathias Krause [this message] 2021-08-08 20:53 ` [PATCH 0/2] wireguard-linux-compat: grsecurity compat patches Jason A. Donenfeld 2021-08-09 10:13 ` Mathias Krause 2021-12-03 22:20 ` Jason A. Donenfeld 2021-12-03 22:25 ` Jason A. Donenfeld 2021-12-06 14:04 ` Mathias Krause 2021-12-06 14:48 ` Jason A. Donenfeld 2021-12-06 16:24 ` Mathias Krause 2021-12-06 16:27 ` Jason A. Donenfeld 2021-12-06 18:18 ` Mathias Krause 2021-12-06 18:55 ` Jason A. Donenfeld 2021-12-06 19:28 ` Jason A. Donenfeld 2021-12-06 20:54 ` Mathias Krause 2021-12-08 14:56 ` Jason A. Donenfeld 2021-12-06 21:00 ` Mathias Krause 2021-12-08 14:56 ` Jason A. Donenfeld 2021-12-09 7:59 ` Mathias Krause 2021-12-10 22:36 ` Jason A. Donenfeld 2021-12-10 22:58 ` Jason A. Donenfeld 2021-12-11 16:35 ` Aymeric Fromherz 2021-12-12 21:43 ` Jason A. Donenfeld 2021-12-13 7:54 ` Mathias Krause 2021-12-13 11:36 ` Jason A. Donenfeld 2021-12-13 16:29 ` Jason A. Donenfeld 2021-12-13 16:46 ` Mathias Krause 2021-12-13 7:44 ` Mathias Krause 2021-12-13 14:20 ` Aymeric Fromherz 2021-12-13 14:33 ` Mathias Krause 2021-12-13 14:37 ` Jason A. Donenfeld 2021-12-13 16:32 ` Mathias Krause 2021-12-13 16:33 ` Jason A. Donenfeld 2021-12-13 16:39 ` Mathias Krause 2021-12-13 16:53 ` Jason A. Donenfeld
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